Como comparar tensoes no psim de outros arqivos

This work focuses on the analysis and design of CMOS analog integrated circuits with series associations of MOS transistors, using the Improved Advanced Compact MOSFET (ACM) model. The motivation of this work is the fact that long and medium channel MOS devices are often required for the circuit to perform low output conductance, which in turn allows high voltage gains and good regulation of current mode cells. However, the use of single long channel devices renders layout extremely difficult or unfeasible inside a constrained silicon area. Therefore, the splitting of long and medium channel transistors into several short channel devices in series is strongly recommended in these cases. Nevertheless, it can be observed that the series association of short channel MOS transistors still preserves a few short channel effects, since the drain current values are much lower than that of a single device with the correspondent total channel length. In general the sizing stage of an integrated circuit design employs very simple MOSFET models for hand calculation, which do not take into account second order effects of transistor operation. Hence, the first simulation results greatly depart from specifications and many cycles alternating sizing by hand and simulation are required until the desire performance is achieved. This scenery may be critical for the whole analog IC design flow, augmenting the time-to-market. The improved ACM model is a modified version of ACM (Advanced Compact MOSFET) model, which takes into account some second order effects, thus approaching first simulation results, obtained from the first calculated dimensions, to the specifications and avoiding the necessity of many sizing-simulation cycles. However, even improved ACM model fails in the case of using series associations of short channel transistors, instead of the medium and long channel devices previously dimensioned. This is because the composite and single devices are not equivalent indeed. In this work this issue is analyzed and simple adaptations are proposed to the design methodologies in order to use series associations of MOS transistors and to consequently benefit from the low output conductance thus obtained and from adequate IC layouts. The sizing methods have been successfully applied to simple current sinks and sources and to CMOS active load voltage dividers from a 130 nm technology.